The present invention relates to a semiconductor device and a manufacturing method thereof. In particular, the present invention relates to an effective technique to be applied to make the outer shape of a semiconductor device smaller and thinner.
In recent years, mobile communication equipment such as digital cellular phones or the like, and high-speed data communication equipment, and the like have been required to be small, thin and lightweight, low power consumption, a high frequency, and multi bands. For this reason, a high-frequency module such as an antenna switch module and a voltage controlled oscillator module and the like constituting a key component in the above-mentioned mobile communication equipment and high-speed data communication equipment and the like has been smaller, thinner and more lightweight. For the purpose of improving the high-frequency characteristic, plural high-frequency modules have been combined.
In response to reduction in the size of the high-frequency module, various diodes including a variable capacitance diode, a PIN diode, a Schottky diode used in the high-frequency module are required to be small. In the conventional package of these diodes, for example, there is prepared a lead frame having leads in which each anode side and each cathode side are paired and are opposite to each other; a back electrode of a semiconductor chip on which a diode element is formed is adhered to an inner end portion (tab) of each lead in the anode side or the cathode side; a front electrode of the semiconductor chip and an inner end portion (post) of the other lead opposite to each lead described above is connected by wire bonding using an Au (gold) wire; and the semiconductor chip, the wire and the pair of leads described above are resin-sealed with a resin material to provide a resin package. In this manner, in the conventional diode, one electrode is formed on the front face of the semiconductor chip and the other electrode is formed on the back face of the semiconductor chip, and the front electrode of the semiconductor chip is connected to each lead by a wire.
These above-mentioned diode construction is described in, for example, xe2x80x9cTotal Electronic Parts Handbookxe2x80x9d, p.179, edited by Electronic Industries Association of Japan which is issued by Denpa Shimbun-sha on May 20, 1984.
The present inventors have found that the above-mentioned diode has the following problems.
That is, when the front electrode of the semiconductor chip on which a diode element is formed and the post side of the lead are connected by wire bonding, such a wire loop shape that a wire is expanded upward is formed. Further, since the semiconductor chip, the wire and the leads are resin-sealed, there arise such a problem that the wire with a wire loop shape, the leads connected to the wire, and the resin used for resin sealing hinder a package size reduction in a height (thickness) direction and the plane size of the package.
To solve the above-mentioned problems, for example, measures for reducing the thickness of the diode package can be considered by reducing the thickness of the semiconductor chip, the thickness of the resin and the height of the wire loop shape. However, a manufacturing facility must be improved to enhance the processing accuracy of respective materials, and cost required to update the manufacturing facility is reflected on the manufacturing cost of the diode. Therefore, there arises such a problem that it is difficult to make the diode package small at low cost.
In the above-mentioned diode, since the front electrode of the semiconductor chip and the post side of each lead are connected by wiring bonding using a wire, it is difficult to reduce inductance of the wire and each lead and to lower the capacitance between the leads that are paired. For this reason, there arises such a problem that the conventional diode described above limits reduction of loss during operation in a high-frequency region.
As an invention for reducing the cost and size of the diode, there is the invention disclosed in Japanese Patent Laid-Open No. 2000-150918. In this reference cited, an opening hole portion, is formed which reaches to an n-type semiconductor substrate as a lower layer portion, from these surface of a semiconductor chip on which a diode element is formed, and then, in the inside of the opening hole portion, an extraction electrode (cathode electrode) extending from the above-mentioned n-type semiconductor substrate to the surface of the semiconductor chip is formed. This discloses a diode technique in which, together with a front electrode (anode electrode) electrically connected to a p-type semiconductor region that is an upper layer portion, both the anode and cathode electrodes are formed on the same surface of the semiconductor chip, and both the anode electrode and the cathode electrode are facedown bonded without using any wires and leads.
In the case where the semiconductor chip is mounted by facedown bonding using the diode technique described in the above reference cited, the connection stats of mounting cannot be confirmed. Therefore, it can be considered to employ a so-called self-alignment mounting method which automatically corrects each connection position of both the above-mentioned anode and cathode electrodes by the surface tension of solder melted. Here, the diode is mounted by connecting both anode and cathode electrodes to the mounting board by means of solder. In the case where the solder shapes or the soldering areas to be formed on both the anode and cathode electrodes are different, it has been found that the surface tensions of the solders melted in both the electrodes are different in strength and the diode chip is upright, so that a phenomenon is caused in which one of the electrodes may be removed from the mounting board. In the technique described in the above reference cited, however, recognition of such a phenomenon and consideration thereto have not been made.
In the above publication, improvement of the high-frequency characteristic of the diode is not described.
An object of the present invention is to provide a technique for reducing the package size of a semiconductor device at low cost.
Another object of the present invention is to provide a technique for reducing loss during operation in the high-frequency region of the semiconductor device.
A further object of the present invention is to provide a technique for preventing mounting failure of a semiconductor device mounted by facedown bonding.
The foregoing and other objects and novel characteristics of the present invention will be apparent from the description of the present specification and the accompanying drawings.
An overview of the representative inventions disclosed in this application will be briefly described as follows.
In other words, the present invention includes:
(a) a diode having a cathode electrode and an anode electrode over one main surface of a semiconductor substrate; and
(b) said cathode electrode having a plane area larger than the anode electrode.
In addition, the present invention includes:
(a) a diode having a cathode electrode and an anode electrode over one main surface of a semiconductor substrate;
(b) a plurality of electrode bumps which is connected to the cathode electrode and the anode electrode, respectively, and which is provided on said one main surface; and
(c) said plurality of electrode bumps which is symmetrically arranged in said one main surface of the semiconductor substrate.
Further, the present invention includes the steps of: preparing a semiconductor substrate having one main surface and the other main surface opposite thereto and having a first conductive type epitaxial layer; selectively forming, in said epitaxial layer, a region extending from said one main surface to said other main surface; selectively forming, in said epitaxial layer, a second conductive type high-density region extending from said one main surface into said epitaxial layer and separated from said first conductive type high-density region; forming a cathode electrode electrically connected to said first conductive type high-density region and an anode electrode electrically connected to said second conductive type high-density region in such a state as to be insulated from each other; and forming electrode bumps electrically connected to the cathode electrode and electrode bumps electrically connected to the anode electrode.